Welcome to the web pages of Paul Kaufmann

I am an assistant professor at Mainz University, Germany. My research focuses on nature-inspired optimization techniques and their application to adaptive and reconfigurable systems. After receiving a Ph.D. in Evolvable Hardware (2013) from Paderborn University, I stayed at the Fraunhofer Institute for Wind Energy and Energy System Technology and the Energy Management and Power System Operation Group at the University of Kassel from 2012 to 2013. Afterwards, I was a postdoctoral researcher at the Computer Engineering Group at Paderborn University until joining Mainz University as an assistant professor for Computational Intelligence in 2017. I am organizing the annual EvoENERGY Workshop at the EvoStar Conference, heading the IEEE CIS University Curricula subcommittee, and have co-founded and heading the IEEE Task Force on Computational Intelligence in the Energy Domain. I am also a member of the IEEE Task Force on Evolvable Hardware.


  • The EvoENERGY track has accepted 5 excellent papers. Please consider visiting the Evostar conference (Parma, Italy. 4-6 April 2018).
  • Please visit the Workshop on Evolutionary Algorithms for Smart Grids (SmartEA) at ​GECCO 2017 in Berlin, July 15th-19th 2017
  • journal paper: "Three-Stage Power System Restoration Methodology Considering Renewable Energies" accepted by Elsevier International Journal of Electrical Power and Energy System, 2017
  • paper "Parametrizing Cartesian Genetic Programming: An Empirical Study" accepted an KI'17 in Dortmund
  • poster "An Empirical Study on the Parametrization of Cartesian Genetic Programming" accepted at GECCO'17 in Berlin
  • journal paper "Fast Network Restoration by Partitioning of Parallel Black Start Zones" accepted by the Journal of Engineering, Elsevier, 2017
  • paper "Evaluation Methodology for Complex Nondeterministic Functions: A Case Study in Metaheuristic Optimization of Caches" accepted at the IEEE Adaptive Hardware and Systems (AHS), 2017
  • paper "Accurate Private/Shared Classication of Memory Accesses: a Run-time Analysis System for the LEON3 Multi-core Processor" accepted at the Design, Automation and Test in Europe (DATE), 2017